EDITORIAL CALENDAR

ISSUES TOPICS EXTRA DISTRIBUTION
September/October 2009 • TSV 3D Technology for CMOS Image Sensor Packaging
• Super High Density Two Metal Layer Ultra-Thin Organic HDI Substrates
• 3D Packaging Interconnects for Mobile Internet Devices
• EmbeddedWafer-Level BGA for Next Generation Packages
• Lithography for Next-GenerationWLP and Devices
• System on Package (SoP)
• Wire and Ribbon Bonding
TBD
November/December 2009 • WLP Solder Bump ReflowTechnologies
• Chip toWafer Bonding Enable System in Package (SiP) Production
• Test and Burn-In for Multichip Packages
• Active and Passive Component Embedding in HDI Substrates for IC Packaging
• Nanotech Materials Enable Device Packaging
• Advanced Processes for 3DWLP TSV Integration
TBD
January/February 2010 • Lower CostWLCSP Technologies
• Singulation and Dicing Advances
• Cost-EffectiveWLP TSV Etching
• Dispensing Equipment Vendors
• Copper Electro-Deposition for Advanced Packages
• 3D HDI Interconnects in Single- and Multichip Packages
• Thermal Interface Material Innovations
TBD
March/April 2010 • WLP Thinning, Stacking & Bonding
• PVD Deposition for TSV Formation
• Acoustic,AOI and X-ray Package Inspection
• IC & Package EDA Packaging Co-Design Tools
• Low CostWLCSP Interconnections
• Die Attach and Die Bonding
• Solder Ball Placement Options
TBD
May/June 2010 • WLP Copper-Copper Bonds for TSV Interconnects
• Hermetic Packaging for Multichip MEMS
• All-Surface Inspection for 3D Interconnects & TSVs
• Solder Trends in Assembly/Packaging
• Plasma andWet Cleaning Technologies
• HDI Interposer Infrastructure Challenges
• Design forWafer Level Device Packaging
• Solder Paste Buyer’s Guide
TBD
July/August 2010 • Super ThinWafer Bonding
• Solder Bonding forWLP and Vertical Interconnecting ICs & MEMS
• DRIE for TSV Formation
• WLPWet Processing for UBM and RDL
• 3D Multichip Packaging Options
• Embedding Active & Passive Devices In HDI Interposers/Substrates
• Flip Chip and Die Attach Equipment Buyer’s Guide
SEMICONWest
September/October 2010 • Chip-to-Wafer Bonding for Silicon in Package (SiP) Production
• WLPWafer Stacking
• Stencil Printing forWafer Bumping
• Mobile Device Packaging Solutions
• Organic and Inorganic Interposers
• Optoelectronic and RF Device Integration
• Burn-In and Test Socket Buyer’s Guide
TBD
November/December 2010 • Encapsulating Next Generation MEMS & Sensor Microsystems
• Wafer-Level Probers and Probe Cards
• Ultra Thin Packages
• Bio-Medical Device Packaging
• WetWafer-Level Packaging
• Packaging Foundry Buyer’s Guide
TBD

Note: All listings are subject to availability of suitable material prior to closing, available space and may be revised or modified at the publisher’s discretion.